SV DPI技术在FPGA仿真验证的应用探讨

SystemVerilog作为近年来逐渐流行的FPGA验证语言,包含了丰富的验证特性：DPI、断言技术、功能覆盖率等,其中DPI接口技术可以帮助验证工程师在验证平台中实现对C或C++的调用,验证工程师可以通过编写C函数来实现复杂激励模型设计,同时也为进行复杂算法的FPGA设计的仿真验证提供了新的验证思路。本文提出一种基于DPI接口的FPGA仿真验证方法,实验表明：利用该方法搭建的仿真验证平台相对于传统的纯verilog验证平台,具有更高的仿真效率和验证的灵活性。该验证方法为算法级FPGA设计的确认测试提供了新的验证思路。

Application of SV DPI technology in FPGA simulation verification

As gradually popular FPGA validation language in recent years, SystemVerilog contains rich validation features: DPI, assertion technology, functional coverage, etc. DPI interface technology can help verification engineer to call C or C + + in the verification platform, verification engineers can complex incentive model is designed by writing C function . DPI interface technology also provides a new simulation validation for the complex algorithm of the FPGA design. This paper proposes a FPGA simulation method based on DPI interface, the experiment shows that the simulation validation platform by using this method compared with the traditional pure verilog verification platform, has higher efficiency of the simulation and more flexibility of verification .This verification method provides a new way of verification for the validation test of the algorithm FPGA design.