| 一种新型全加器结构的设计 |
| |
| 引用本文： | 李天望 王晓悦. 一种新型全加器结构的设计[J]. 微电子学, 1997, 27(4): 251-253 |
| |
| 作者姓名： | 李天望 王晓悦 |
| |
| 作者单位： | 复旦大学电子工程系 |
| |
| 摘 要： | 全加器是算术运算的基本单元，设计结构简单的全加器有利于缩小数字自理芯片的面积。根据最新的ＸＯＲ门结构设计了一种新的全加器，这种结构的一位全加器只用２０只ＭＯＳ管，对这种新的全加器，用ＰＳＰＩＣＥ进行了晶体管级模拟。结果显示，这种新的全加器能正确完成加法器的逻辑功能。
|
| 关 键 词： | 全加器 运算器 集成电路 MOS 设计 |
Design of a Novel Full Adder Architecture |
| |
| LI Tian-Wang,WANG Xiao-Yue and HONG Zhi-Liang Dept.Elctro. Engineer. .Fudan Univ.,Shanghai ). Design of a Novel Full Adder Architecture[J]. Microelectronics, 1997, 27(4): 251-253 |
| |
| Authors: | LI Tian-Wang WANG Xiao-Yue HONG Zhi-Liang Dept.Elctro. Engineer. .Fudan Univ. Shanghai ) |
| |
| Affiliation: | LI Tian-Wang,WANG Xiao-Yue and HONG Zhi-Liang Dept.Elctro. Engineer. .Fudan Univ.,Shanghai 200433 ) |
| |
| Abstract: | Based on the new XOR gate ,a novel full adder has been designed. Compared with previous architecture , the new full adder only consists of 20 MOS transistors. A simulation was made on the new full adder at the transistor level using PSPICE. Results show that the novel structure can realize the logic function of an adder successfully. |
| |
| Keywords: | XOR gate Adder Arithmetic operation .Device modeling EEACC 1290 2570F |
| 本文献已被 CNKI 维普 等数据库收录！ |
