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一种新型CMOS带隙基准电压源
引用本文:吴旭,陈迪平,黄嵩人,季惠才,王镇道. 一种新型CMOS带隙基准电压源[J]. 电子与封装, 2012, 12(4): 16-19
作者姓名:吴旭  陈迪平  黄嵩人  季惠才  王镇道
作者单位:1. 湖南大学物理与微电子科学学院,长沙,410082
2. 中国电子科技集团公司第58研究所,江苏无锡,214035
摘    要:传统带隙基准源电路采用PNP型三极管来产生ΔVbe,此结构使运放输入失调电压直接影响输出电压的精度。文章在对传统CMOS带隙电压基准源电路原理的分析基础上,提出了一种综合了一阶温度补偿和双极型带隙基准电路结构优点的高性能带隙基准电压源。采用NPN型三极管产生ΔVbe,消除了运放失调电压影响。该电路结构简洁,电源抑制比高。整个电路采用SMIC 0.18μmCMOS工艺实现。通过Cadence模拟软件进行仿真,带隙基准的输出电压为1.24V,在-40℃~120℃温度范围内其温度系数为30×10-6/℃,电源抑制比(PSRR)为-88 dB,电压拉偏特性为31.2×10-6/V。

关 键 词:带隙电压基准源  温度系数  电源抑制比

A Novel CMOS Bandgap Reference
WU Xu,CHEN Di-ping,HUANG Song-ren,JI Hui-cai,WANG Zhen-dao. A Novel CMOS Bandgap Reference[J]. Electronics & Packaging, 2012, 12(4): 16-19
Authors:WU Xu  CHEN Di-ping  HUANG Song-ren  JI Hui-cai  WANG Zhen-dao
Affiliation:1.Microelectronics and Solid state electronics of Hunan University,Changsha 410082,China;2.China Electronics Technology Group Corporation No.58 Research Institute,Wuxi 214035,China)
Abstract:The normal band-gap low voltage reference circuit always adopt PNP to produce ΔVbe,however the offset voltage of the OPA directly influences the precision of the output voltage reference.The design of a 30×10-6/℃ CMOS bandgap voltage reference with low power supply voltage in temperature compensation and with the NPN to produce ΔVbe technology is described.The band-gap reference is implemented in SMIC 0.18μm CMOS process leading to an output voltage of about 1.24V.Simulation shows the average temperature coefficient is 30×10-6/℃ in the range from-40℃ to +120℃,PSRR is-88dB at 27℃ and voltage level bias characteristic is 31.2×10-6/ V.
Keywords:band-gap voltage reference  temperature coefficient  PSRR
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