| 用于SOC系统的逐次逼近型ADC设计 |
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| 引用本文： | 龙善丽,殷勤,吴建辉,王沛. 用于SOC系统的逐次逼近型ADC设计[J]. 固体电子学研究与进展, 2007, 27(3): 380-385 |
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| 作者姓名： | 龙善丽 殷勤 吴建辉 王沛 |
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| 作者单位： | 东南大学国家专用集成电路系统工程技术研究中心,南京,210096 |
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| 摘 要： | 设计了一个基于SOC系统的触摸屏逐次逼近型结构的10 bit 2Msps模数转换器(ADC)。高精度比较器和Bootstrap开关应用于设计电路中,提高了芯片速度和降低了功耗。芯片采用SMIC0.18μm 1P6M CMOS工艺流片,版图面积为0.25mm2,2MHz工作时平均功耗为3.1mW。输入频率320kHz时,信噪比(SNR)为56dB,ENOB为9.05bit,无杂散动态范围(SFDR)为66.56dB,微分非线性(DNL)为0.8LSB,积分非线性(INL)为1.4LSB。
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| 关 键 词： | 嵌入式系统 触摸屏 逐次逼近 比较器 有效精度 |
| 文章编号： | 1000-3819（2007）03-380-06 |
| 修稿时间： | 2006-11-09 |
Design and Realization of a Successive Approximation ADC in SOC System |
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| LONG Shanli,YIN Qin,WU Jianhui,WANG Pei. Design and Realization of a Successive Approximation ADC in SOC System[J]. Research & Progress of Solid State Electronics, 2007, 27(3): 380-385 |
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| Authors: | LONG Shanli YIN Qin WU Jianhui WANG Pei |
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| Affiliation: | National ASIC System Engineering Research Center, Southeast University, Nanjing, 210096, CHN |
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| Abstract: | A 10 bit 2Msps successive approximation ADC in SOC system is described. A High accurate comparator and bootstrap-switch is implemented in the ADC to pursue high speed and low power consumption. This circuit is realized with SMIC 0.18 μm 1P6M CMOS process and occupies 0.25 mm2. It consumes 3.1 mW when operating at 2 MHz. SNR is 56 dB and the SFDR is 66.56 dB when the chip samples 320 kHz sinusoid wave. |
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| Keywords: | soc system touch screen successive approximation comparator ENOB |
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