A 100-Msps sampling analog-to-digital converter chip set

The authors describe a 100-Msps sampling analog-to-digital converter (ADC) chip set that can be used for a wideband high-resolution digital storage oscilloscope (DSO). A high conversion rate and a 500-MHz sampling bandwidth with an 8-b effective resolution are obtained by a combination of three Si-bipolar chips and two GaAs-diode chips. the ADC uses a pipelined two-step subranging architecture that uses two cascade wideband track-and-hold (T/H) circuits. The design features of the T/H circuits and the residual amplifier are also presented