A quasi-matrix ferroelectric memory for future silicon storage

We proposed a new quasi-matrix ferroelectric memory for use in future silicon-storage media. The memory unit consists of multiple ferroelectric capacitors and one access transistor. Each capacitor stores 1 bit of data, and the access transistor is shared by several capacitors. Compared with conventional crosspoint matrix type FeRAMs, which cause a signal degradation by read/write disturbance, this memory limits the disturbing frequency to an acceptable level by accessing the memory unit as a whole. Crosstalk noise was also minimized by applying a unique access scheme. This memory has a scalability by adopting built-in sense circuits, and enables an extremely high packing density with three-dimensional multistacking structures of memory cells.