| 一个VLSI三层布线通孔最少化的启发式算法 |
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| 引用本文： | 马琪,严晓浪.一个VLSI三层布线通孔最少化的启发式算法[J].电子与信息学报,2001,23(10):1014-1021. |
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| 作者姓名： | 马琪 严晓浪 |
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| 作者单位： | 杭州电子工业学院CAD研究所, |
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| 摘 要： | 该文在三层布线的线段-相交图模型基础上,提出了一个启发式算法来解决VLSI三层布线通孔最少化问题,该算法通过总体优化和局部优化两个阶段对三层布线进行通孔优化。算法考虑了实际约束的处理方法,并进行大量的布线实例验证。
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| 关 键 词： | VLSI 通孔最少化 启发式 三层布线 |
| 收稿时间： | 1999-9-6 |
| 修稿时间： | 1999年9月6日 |
A HEURISTIC ALGORITHM TO THREE-LAYER CONSTRAINED VIA MINIMIZATION |
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| Ma Qi,Yan Xiaolang.A HEURISTIC ALGORITHM TO THREE-LAYER CONSTRAINED VIA MINIMIZATION[J].Journal of Electronics & Information Technology,2001,23(10):1014-1021. |
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| Authors: | Ma Qi Yan Xiaolang |
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| Affiliation: | CAD Research Center Hangzhou Institute of Electronic Engineering Hangzhou 310037 China |
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| Abstract: | In this paper, a heuristic approach for constrained via minimization for VLSI three-layer routing on the basis of segment-crossing graph model is presented. Two types of algorithm-global sense and local sense are combined into the new algorithm. In addition, many physical constraints are taken into consideration. According to the results, this algorithm is verified to be very efficient and encouraging. |
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| Keywords: | VLSI Constrained via minimization Heuristic Three-layer routing |
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