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Geometrical Variability Impact on the Performance of Sub - 3 nm Gate-All-Around Stacked Nanosheet FET |
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| Authors: | Yadav Nisha Jadav Sunil Saini Gaurav |
| Affiliation: | 1.Department of Electronics Engineering, J.C.Bose University of Science and Technology, YMCA, Sector 6, Faridabad, 121006, Haryana, India ;2.Department of Electronics and Communication Engineering, National Institute of Technology, Kurukshetra, 136119, Haryana, India ; |
| Abstract: | Silicon - To meet the scaling targets and continue with Moore’s Law, the transition from FinFET to Gate-All-Around (GAA) nanosheet Field Effect Transistors (FETs) is the necessity for... |
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