Simplified symbolic transfer function factorization using combined artificial bee colony and simulated annealing

Symbolic circuit analysis inherits the exponential growth of transfer function complexity with the circuit size. Therefore, symbolic simplification is an NP-hard problem. Although many simplification techniques have been presented, the simplified transfer functions are not written in a factorized form, and consequently, it is difficult to assess the contribution of poles and zeros on the circuit behavior. In this paper, a swarm intelligence based methodology is presented for the simplified factorized symbolic analysis of analog circuits. In this method, an extension of the root splitting technique is utilized to rewrite the expanded transfer function of the circuit into a factorized form comprising DC-gain, poles, and zeros. Then, the derived factorized transfer function is simplified using a hybrid Global and Local search algorithm based on Artificial Bee Colony and Simulated Annealing (named GLABCSA). The objective function is defined to minimize the complexity of the symbolic factorized transfer function while minimizing the DC-gain error and pole/zero displacements. The presented approach has been successfully developed in MATLAB. The program can derive the simplified factorized symbolic transfer function automatically from the input text netlist of the circuit. Symbolic and numerical results over two analog amplifiers are given to illustrate the efficiency of the presented methodology.