Analysis of nanometer-scale InGaAs/InAs/InGaAs composite channel MOSFETs using high-K dielectrics for high speed applications |
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| Affiliation: | 1. STMicroelectronics, 850 rue Jean Monnet, BP 16, 38926 Crolles, France;2. IMEP-LAHC, Minatec/INPG, BP 257, 38016 Grenoble, France;1. Dept. of Electronics and Instrumentation Engineering, Siksha ‘O’ Anusandhan University, Bhubaneswar, Odisha 751030, India;2. Department of Electronics and Communication Engineering, Siksha ‘O’ Anusandhan University, Bhubaneswar, Odisha 751030, India;3. Department of Electrical Instrumentation and Control Engineering, Siksha ‘O’ Anusandhan University, Bhubaneswar, Odisha 751030, India;1. Department of Electrical Engineering and Information Systems, The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan;2. JST-CREST, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan;3. Korea Institute of Science and Technology, Seoul 136-791, Republic of Korea;4. Zhejiang University, Hangzhou 310027, China;1. Research Scholar, Faculty of Information and Communication Engineering, Anna University, Chennai, Tamilnadu, India;2. Department of Electrical and Computer Science, M.A.M College of Engineering, Trichy, Tamilnadu, India;3. Department of Electronics and Communication Engineering, M.A.M. College of Engineering and Technology, Trichy, Tamilnadu, India;4. Department of Electronics and Communication Engineering, SNS College of Technology, Coimbatore, Tamilnadu, India;5. Department of Electronics and Communication Engineering, Karunya University, Coimbatore, Tamilnadu, India |
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| Abstract: | The outstanding electron transport properties of InGaAs and InAs semiconductor materials, makes them attractive candidates for future nano-scale CMOS. In this paper, the ON state and OFF state performance of 30 nm gate length InGaAs/InAs/InGaAs buried composite channel MOSFETs using various high-K dielectric materials is analyzed using Synopsys TCAD tool. The device features a composite channel to enhance the mobility, an InP spacer layer to minimize the defect density and a heavily doped multilayer cap. The simulation results show that MOSFETs with Al2O3/ZrO2 bilayer gate oxide exhibits higher gm/ID ratio and lower sub threshold swing than with the other dielectric materials. The measured values of threshold voltage (VT), on resistance (RON) and DIBL for Lg = 30 nm In0.53Ga0.47As/InAs/In0.53Ga0.47As composite channel MOSFET having Al2O3/ZrO2 (EOT = 1.2 nm) bilayer dielectric as gate oxide are 0.17 V, 290 Ω-µm, and 65 mV/V respectively. The device displays a transconductance of 2 mS/µm. |
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| Keywords: | Atomic layer deposition Composite channel Drain-current enhancement High-K InAs InGaAs MOSFETs InP Leakage |
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