| 基于FPGA的HDB3码编码器优化设计与分析 |
| |
| 引用本文： | 王晓聪,何永泰. 基于FPGA的HDB3码编码器优化设计与分析[J]. 现代电子技术, 2011, 0(24): 146-148 |
| |
| 作者姓名： | 王晓聪 何永泰 |
| |
| 作者单位： | 楚雄师范学院物理与电子科学系; |
| |
| 基金项目： | 楚雄师范学院重点项目支持(10XYZD003) |
| |
| 摘 要： | 利用四进程和结构化设计两种不同的VHDL程序设计方法,对HDB3编码器进行了设计、实现和功能分析。设计的两种编码器在QuartusⅡ7.2中进行了功能分析,并且下载到EP2C5T144C6中实现了HDB3编码转换功能。分析与实验结果表明,所设计的两种HDB3编码器,具有好的编码功能。其中,结构化设计的HDB3编码器对FPGA逻辑单元、寄存器的占用分别减少了18.5%和14.8%,具有较好的资源利用特性。
|
| 关 键 词： | HDB3编码器 VHDL程序 逻辑单元 结构化设计 |
Design and Analsis of FPGA-based HDB3 Encoder |
| |
| WANG Xiao-cong,HE Yong-tai. Design and Analsis of FPGA-based HDB3 Encoder[J]. Modern Electronic Technique, 2011, 0(24): 146-148 |
| |
| Authors: | WANG Xiao-cong HE Yong-tai |
| |
| Affiliation: | WANG Xiao-cong,HE Yong-tai(Department of Physics and Electron Information Science,Chuxiong Normal University,Chuxiong 675000,China) |
| |
| Abstract: | HDB3 encoder is designed with two different VHDL program design methods of four-process and structured design.The two encoders are functionally analyzed in QuartusⅡ 7.2,and are loaded in EP2C5T144C6 to realize HDB3 code convertion function.The analysis and experiment results show that both HDB3 encoders have exellent coding function.The duty ratio of HDB3 encoder designed with the method of structured design to FPGA logic element（LE） and register is 18.5% and 14.8% respectively.It has a good feature of resource utilization. |
| |
| Keywords: | HDB3 encoder VHDL program logic element |
| 本文献已被 CNKI 维普 等数据库收录！ |
