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Berger check prediction for concurrent error detection in the Braun array multiplier
Authors:C.M. Jones  S.S. Dlay  R.N.G. Naguib
Affiliation:

Department of Electrical and Electronic Engineering, University of Newcastle upon Tyne NE1 7RU, UK. Tel: +44 (0) 191 222 7340. Fax: +44 (0) 191 222 8180

Abstract:The design and development of concurrent error detection arithmetic and logic units has initiated significant research concerning information coding schemes. Published research has used the unidirectional fault detection capabilities of Berger codes to achieve a fault tolerant Braun array multiplier.

In this paper we develop Berger check symbol prediction and show that the previously reported Berger coded prediction is in error, making the results inappropriate for the realization of practical concurrent error detection systems. Furthermore, we show that the Berger coded Braun array multiplier can not only achieve the objective for detecting unidirectional faults but analysis has indicated an inherent ability of the Berger check prediction technique for error detection beyond the scope for which it was originally intended. In fact the coding provides error detectability for single and multiple stuck-at faults. Further study suggests the performance of the Berger check prediction Braun array multiplier tends towards 100% error detectability for increasing input bit length and hence array dimensions.

The Berger check predictive Braun array multiplier has, therefore, introduced a high level of concurrent error detectability with only a minimal extension in the hardware implementation.

Keywords:
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