| 基于FPGA的8PSK解调器设计 |
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| 引用本文： | 杜兵团,郭海鹏.基于FPGA的8PSK解调器设计[J].无线电工程,2014(11):73-76. |
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| 作者姓名： | 杜兵团 郭海鹏 |
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| 作者单位： | 1. 中国电子科技集团公司第五十四研究所,河北 石家庄,050081
2. 河北省中小企业信息中心,河北 石家庄,050071 |
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| 基金项目： | 国家部委基金资助项目。 |
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| 摘 要： | 8PSK是一种高带宽效率的多相位键控调制解调技术，在高速数据传输领域具有广阔的应用前景。对Gardner算法和PFD频相联合检测算法进行了仿真研究，给出了实现8PSK全数字解调器符号同步和载波同步的完整结构。在XILINX公司的ISE环境下，用Verilog语言设计实现了8PSK全数字解调器。对该8PSK解调器的解调性能进行了测试，在误码率为10^-6时，解调损失小于1 dB。
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| 关 键 词： | 8PSK解调器 符号定时同步 载波同步 |
Design on 8PSK Demodulator Based on FPGA |
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| DU Bingtuan,Guo Hai-peng.Design on 8PSK Demodulator Based on FPGA[J].Radio Engineering of China,2014(11):73-76. |
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| Authors: | DU Bingtuan Guo Hai-peng |
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| Affiliation: | DU Bingtuan, Guo Hai-peng (1. The 54th Research Institute of CETC, Shijiazhuang Hebei 050081, China; 2. Hehei Center for SME Information, Shifiazhuang Hebei 050071, Chlna) |
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| Abstract: | 8PSK is a multiphase shift key modulation and demodulation technology with high-bandwidth efficiency which has great application prospect in the field of high speed data transmission. A simulation study about the Gardner algorithm and the phase and fre-quency detectors （ PFD） algorithm is conducted and the complete structure of symbol timing synchronization and carrier synchronization in 8PSK all-digital demodulator is presented in the paper. The 8PSK all-digital demodulator is designed and implemented by Verilog codes in ISE of XILINX. Finally,the demodulation performance of 8PSK demodulator is tested and the results show that the the demod-ulation loss is less than 1 dB when the BER is equal to 10-6 . |
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| Keywords: | 8PSK demodulator symbol timing synchronization carrier synchronization |
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