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A new method for nuclear ADCs using the vernier approximation technique
Authors:P.P. Vaidya  K.R. Gopalakrishnan  V.A. Pethe  T. Anjaneyulu
Affiliation:Electronics Division, Bhabha Atomic Research Centre, Trombay, Bombay-400 085, India;Electrical Engineering department, Indian Institute of Technology, Bombay-400 076, India
Abstract:The paper describes a new method of analog-to-digital conversion. The method named the vernier approximation technique utilizes two scales made of chains of resistors sliding over each other, one being called the main scale and the other the vernier scale. The vernier scale is moved by applying the input analog voltage as a voltage shift at both ends. This voltage shift is digitized using the comparators connected between the corresponding points on main and vernier scales. All the quantization steps are derived from a single quantization step using the process of sliding and vernier scaling resulting in high differential linearity. The scheme uses a balancing technique to balance the points on the main scale with the corresponding points on the vernier scale. The scheme works with the speed of a “sequential parallel approximation technique” giving a higher speed of operation than either the Wilkinson technique or the successive approximation technique used for nuclear ADCs. The technique gives high accuracy even with use of ordinary components such as 1% resistors.
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