A 98 mm2 die size 3.3-V 64-Mb flash memory with FN-NORtype four-level cell |
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Authors: | Ohkawa M Sugawara H Sudo N Tsukiji M Nakagawa K Kawata M Oyama K-i Takeshima T Ohya S |
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Affiliation: | ULSI Device Dev. Lab., NEC Corp., Kanagawa; |
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Abstract: | In order to realize high-capacity and low-cost flash memory, we have developed a 64-Mb flash memory with multilevel cell operation scheme. The 64-Mb flash memory has been achieved in a 98 mm2 die size by using four-level per cell operation scheme, NOR type cell array, and 0.4-μm CMOS technology. Using an FN type program/erase cell allows a single 3.3 V supply voltage. In order to establish fast programming operation using Fowler-Nordheim (FN)-NOR type memory cell, we have developed a highly parallel multilevel programming technology. The drain voltage controlled multilevel programming (DCMP) scheme, the parallel multilevel verify (PMV) circuit, and the compact multilevel sense-amplifier (CMS) have been implemented to achieve 128 b parallel programming and 6.3 μs/Byte programming speed |
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