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| 基于LVDS协议的可编程高速信号模拟源设计 | |
| 引用本文： | 董晔,徐大专,朱秋明,蒋学东,许梁津. 基于LVDS协议的可编程高速信号模拟源设计[J]. 航空兵器, 2014, 0(5): 50-54 |
| 作者姓名： | 董晔 徐大专 朱秋明 蒋学东 许梁津 |
| 作者单位： | 1. 南京航空航天大学,南京,210016 2. 南京航空航天大学，南京 210016; 中国空空导弹研究院，河南洛阳 471009 3. 中国空空导弹研究院,河南洛阳,471009 |
| 摘 要： | 设计了一种基于低压差分信号（LVDS）协议的可编程高速信号模拟源。该信号模拟源采用Xilinx公司的Spartan－3E系列现场可编程门阵列（FPGA）作为核心处理芯片，整个逻辑设计集成在一片FPGA内，包括数据生成、信号采集、缓存、并串转换以及LVDS协议数据传输与通用异步收发器控制字（UART）传输的全双工通信等功能。本设计电路结构简单、采集与发送数据速率高、传输接口通用性强且收发具有灵活的可编程性。 |
| 关 键 词： | 信号模拟源 LVDS UART 可编程逻辑器件 |
Design of Programmable High-Speed Signal Emulator Based on LVDS Protocol |
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| DONG Ye,XU Da-zhuan,ZHU Qiu-ming,JIANG Xue-dong,XU Liang-jin. Design of Programmable High-Speed Signal Emulator Based on LVDS Protocol[J]. Aero Weaponry, 2014, 0(5): 50-54 | |
| Authors: | DONG Ye XU Da-zhuan ZHU Qiu-ming JIANG Xue-dong XU Liang-jin |
| Affiliation: | DONG Ye, XU Da-zhuan, ZHU Qiu-ming, JIANG Xue-dong, XU Liang-jin (1. Nanjing University of Aeronautics and Astronautics, Nanjing 210016, China; 2. China Airborne Missile Academy, Luoyang 471009, China) |
| Abstract: | A design of programmable high-speed signal emulator based on LVDS protocol is pro-posed.This signal emulator takes the Spartan-3E family FPGA of Xilinx company as the core processing unit.The whole design is integrated in one FPGA chip which including data generation, signal acquisi-tion, buffer-storage, serial and parallel conversion and duplex communication between PC with external e-quipment through LVDS protocol and UART.The circuit design is very simple and the data transmit-re-ceive is fast and usual, which is also easy for upgrading. |
| Keywords: | signal emulator LVDS UART FPGA |
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