| DESIGN AND FABRICATION OF Si/SiGe PMOSFETs |
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| 引用本文： | Yang Peifeng Li Jingchun Yu Qi Wang Xiangzhan Yang Mohua (Dept. of Microelectronic Science and Eng.,UEST of China,Chengdu 610054)He Lin Li Kaicheng Tan KaizhouLiu Daoguang Zhang Jing Yi Qiang Fan Zerui(National Key Laboratory of Analog IC''''s,Chongqing 400060). DESIGN AND FABRICATION OF Si/SiGe PMOSFETs[J]. 电子科学学刊(英文版), 2002, 19(1): 108-112. DOI: 10.1007/s11767-002-0020-4 |
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| 作者姓名： | Yang Peifeng Li Jingchun Yu Qi Wang Xiangzhan Yang Mohua (Dept. of Microelectronic Science and Eng. UEST of China Chengdu 610054)He Lin Li Kaicheng Tan KaizhouLiu Daoguang Zhang Jing Yi Qiang Fan Zerui(National Key Laboratory of Analog IC''''s Chongqing 400060) |
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| 作者单位： | Yang Peifeng Li Jingchun Yu Qi Wang Xiangzhan Yang Mohua (Dept. of Microelectronic Science and Eng.，UEST of China，Chengdu 610054)He Lin Li Kaicheng Tan KaizhouLiu Daoguang Zhang Jing Yi Qiang Fan Zerui(National Key Laboratory of Analog IC's，Chongqing 400060) |
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| 基金项目： | Supported by National Key Laboratory Fund (99Js09 5.1) |
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| 摘 要： | Based on theoretical analysis and computer-aided simulation, optimized design prin-ciples for Si/SiGe PMOSFET are given in this paper, which include choice of gate materials, determination of germanium percentage and profile in SiGe channel, optimization of thickness of dioxide and silicon cap layer, and adjustment of threshold voltage.In the light of these principles, a SiGe PMOSFET is designed and fabricated successfully.Measurement indicates that the SiGe PMOSFET‘s(L=2μ同洒45 mS/mm(300K) and 92 mS/mm(77K) ,while that is 33mS/mm (300K) and 39mS/mm (77K) in Si PMOSFET with the same structure.
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| 关 键 词： | 锗硅合金 PMOSFET 最佳匹配 设计 制造 |
Design and fabrication of Si/SiGe PMOSFETs |
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| Peifeng Yang,Jingchun Li,Qi Yu,Xiangzhan Wang,Mohua Yang,Lin He,Kaicheng Li,Kaizhou Tan,Daoguang Liu,Jing Zhang,Qiang Yi,Zerui Fan. Design and fabrication of Si/SiGe PMOSFETs[J]. Journal of Electronics, 2002, 19(1): 108-112. DOI: 10.1007/s11767-002-0020-4 |
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| Authors: | Peifeng Yang Jingchun Li Qi Yu Xiangzhan Wang Mohua Yang Lin He Kaicheng Li Kaizhou Tan Daoguang Liu Jing Zhang Qiang Yi Zerui Fan |
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| Affiliation: | 1. Dept. of Microelectronic Science and Eng., UEST of China, Chengdu 610054
2. National Key Laboratory of Analog IC's, Chongqing 400060 |
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| Abstract: | Based on theoretical analysis and computer-aided simulation, optimized design principles for Si/SiGe PMOSFET are given in this paper, which include choice of gate materials, determination of germanium percentage and profile in SiGe channel, optimization of thickness of dioxide and silicon cap layer, and adjustment of threshold voltage. In the light of these principles, a SiGe PMOSFET is designed and fabricated successfully. Measurement indicates that the SiGe PMOSFET’s (L=2μm) transconductance is 45 mS/mm (300K) and 92mS/mm (77K), while that is 33 mS/mm (300K) and 39mS/mm (77K) in Si PMOSFET with the same structure. Supported by National Key Laboratory Fund (99Js09 5.1) |
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| Keywords: | SiGe Alloy PMOSFET Optimization |
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