| 基于FPGA的多路数字信号复接系统设计与实现 |
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| 引用本文： | 赵怡,但涛.基于FPGA的多路数字信号复接系统设计与实现[J].电子科技,2013,26(12):37-39. |
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| 作者姓名： | 赵怡 但涛 |
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| 作者单位： | (1.景德镇陶瓷学院 机械电子工程学院,江西 景德镇 333403;2.景德镇市供电公司 设计院,江西 景德镇 333000) |
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| 基金项目： | 基金项目：景德镇市科技局基金资助项目 |
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| 摘 要： | 数字复分接技术是数字通信网中的一项重要技术,能将若干路低速信号合并为一路高速信号,以提高带宽利用率和数据传输效率。文中在介绍数字复接系统的基础上,采用VHDL对数字复分接系统进行建模设计和实现。并利用乒乓操作和先进先出存储器(FIFO)对复接器进行设计,利用帧同步器对数据进行分接。以QuartusII8.0为仿真软件,对设计进行仿真验证,仿真结果表明,设计实现了复接系统,便于修改电路结构,增强了设计的灵活性,且节约了系统资源。
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| 关 键 词： | 数字复接系统 乒乓操作 先进先出存储器 FPGA |
Design and Realization of Multi-Channel Digital Signals Multiplexer/De-Multiplexer Based on FPGA |
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| ZHAO Yi,DAN Tao.Design and Realization of Multi-Channel Digital Signals Multiplexer/De-Multiplexer Based on FPGA[J].Electronic Science and Technology,2013,26(12):37-39. |
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| Authors: | ZHAO Yi DAN Tao |
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| Affiliation: | (1.School of Mechanical and Electronic Engineering,Jingdezhen Ceramic Institute,Jingdezhen 333403,China;
2.Design Institute,Jingdezhen Power Supply Company,Jingdezhen 333000,China) |
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| Abstract: | An important technique in the network of communication, digital multiplexing and de-multiplexing can improve the transmission efficiency by multiplexing several low speed data flows into a high speed one. After a brief introduction to the multiplexing system, a design using VHDL for digital multiplexing and de-multiplexing is proposed. The FIFO, ping-pong operation and frame synchronization system are adopted. QuartuslI simulation, which shows that the design realizes the function with more flexible circuit structure and source consumption. |
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| Keywords: | digital multiplexing system ping-pong operation FIFO FPGA 8 0 is used for less system re- |
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