数字锁相环相位噪声影响因素分析

数字锁相环作为广泛应用的一种频率合成技术,相位噪声是其关键的技术指标。介绍数字锁相环的关键组成部分,从数字锁相环的相位噪声分析模型出发,阐述各组成部分对相位噪声产生的影响,并分析各部分关键指标的选型依据,然后利用仿真软件搭建仿真模型验证分析结果。为数字锁相环的设计,提高相位噪声性能提供了参考依据。

Analysis of Factors Influencing Phase Noise in Digital PLL

The digital phase-locked loop（PLL） is regarded as a widely-used technology for frequency synthesizing,in which the phase noise is a key performance index of digital PLL.The key components of the digital PLL is introduced.Proceeding from the phase noise of the digital PLL analysis model,the effect of the key components on the phase noise is elaborated and the foundation of the model selection for the key index is analyzed.The analysis result is verified with the simulation model built by the simulation software.The reference is provided for the design of digital PLL with better phase noise performance.