FPLL环路性能分析及优化准则

通过建立联合环路的数学模型,将锁频环(FLL)跟踪误差引入锁相环(PLL),能准确推导出二阶FLL辅助三阶PLL的相位跟踪误差公式.推导结果表明,锁频环辅助的锁相环(FPLL)跟踪误差与之前针对单PLL或FLL的研究结果有较大差别: 考虑加加速度动态效果时,FPLL环路相位跟踪动态应力误差为零;FPLL相位热噪声跟踪误差不仅包含PLL的热噪声,而且具有FLL的热噪声成分.另外,不同于对FLL或PLL单独作优化,提出一个FPLL的联合优化准则: 以FLL动态应力误差小于PLL快速捕捉带为约束,相位跟踪误差最小为目标,对FLL和PLL带宽同时进行优化.最后,数值仿真结果表明,所作FPLL的环路性能分析正确,推导所得误差公式准确;联合优化所得FPLL环路可稳定工作,同时获得相对单PLL更好的相位跟踪精度.研究结果有助于之后FPLL的精确设计.

Performance Analysis and Optimization Method of FPLL

Establishing the loops mathematic module, the phase tracking error equation of the second-order frequency locking loop(FLL) assisted third-order phase locking loop(PLL) is derived. In the module, the tracking error of FLL is mixed into PLL. Two points of view are given: firstly, the phase dynamic tracking error of frequency locking loop assisted PLL(FPLL) is equal to zero in case of jerk; the phase thermal noise tracking error includes the thermal noise of PLL and the noise component of FLL, secondly, a new optimization method is proposed to optimizing both bandwidths of PLL and FLL. The optimization method minimizes the total phase tracking error to meet the need of constraint of FLLs frequency tracking error being within the PLLs locking bandwidth. Simulation shows that the analysis of phase tracking error is accurate; the optimization method is able to improve the tracking accuracy while being stable. This research will help the later extra design of FPLL.