| 带降场层部分衬底SOI高压器件模型 |
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| 引用本文： | 阳小明,李天倩. 带降场层部分衬底SOI高压器件模型[J]. 电力电子技术, 2009, 43(11) |
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| 作者姓名： | 阳小明 李天倩 |
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| 作者单位： | 西华大学,四川,成都,610039 |
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| 摘 要： | 为了获得SOI-LDMOS器件耐压和比导通电阻的良好折中,提出了一种带降场层部分衬底SOI高压器件的新结构.通过蚀刻掉常规SOI-LDMOS漂移区和漏端下方的衬底,使器件击穿电压不再受纵向限制.同时在漂移区引入了降场层,从而有效地改善了比导通电阻.基于二维仿真软件对该器件的耐压和比导通电阻特性进行了研究,结果表明该器件在不增加比导通电阻的情况下,人大提高了耐压能力.
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| 关 键 词： | 器件 击穿电压/比导通电阻 降场层 |
A Model of SOI High Voltage Device with Reduced-field Layer and Partial Substrate |
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| YANG Xiao-ming,LI Tian-qian. A Model of SOI High Voltage Device with Reduced-field Layer and Partial Substrate[J]. Power Electronics, 2009, 43(11) |
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| Authors: | YANG Xiao-ming LI Tian-qian |
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| Affiliation: | YANG Xiao-ming,LI Tian-qian (Xihua University,Chengdu 610039,China) |
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| Abstract: | In order to obtain good compromise of the breakdown voltage and specific on-resistance of SOI-LDMOS,a SOI high voltage device with reduced-field layer and partial substrate is proposed.The breakdown voltage is improved greatly due to no limit to the vertical voltage by etching the substrate below the drift region and drain side,and the reduced-field layer is leaded into drift region to improve the specific on-resistance effectively.The breakdown voltage and specific onresistance of the new structure are res... |
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| Keywords: | device breakdown voltage/specific on-resistance reduced-field layer |
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