皮秒级可调脉宽脉冲码型生成电路设计

针对雷达、通信、电子计量与测试领域对高精度、低噪声、高分辨率、可编程脉冲信号的需求，设计了一种皮秒级可调脉宽脉冲码型生成电路，用于产生脉宽精密可控的多模式多功能系列化脉冲码型信号。该脉冲码型生成电路基于小数分频原理，改变小数分频比将小数杂散移至高频段并由环路低通滤波器滤除，达到降低脉冲信号噪声的目的，在此基础上通过并串转换芯片产生目标信号以及向FPGA提供时钟信号以弥补FPGA本身时钟频率低，精度差的缺点。测试结果表明，脉冲生成电路可产生脉冲频率范围为1mHz～400MHz、最小占空比步进为～的脉冲信号，脉冲信号生成电路输出信号码型可选择归零码、不归零码、归一码、伪随机码等脉冲码型格式的脉冲码型信号。

Picosecond-level adjustable pulse width pulse code generation circuit design

Aiming at the requirements of high precision, low noise, high resolution and programmable pulse signals in the fields of radar, communication, electronic metrology and testing, a picosecond-level adjustable pulse width pulse code generation circuit is designed to generate multi-mode and multi-function serialized pulse code signals with precise and controllable pulse width. The pulse code generation circuit is based on the principle of fractional frequency division. By changing the fractional frequency division ratio, the fractional spurious is moved to the high frequency band and filtered by the loop low-pass filter to reduce the noise of the pulse signal. On this basis, the target signal is generated by the parallel-series conversion chip and the clock signal is provided to the FPGA to make up for the shortcomings of low clock frequency and poor accuracy of the FPGA itself. The test results show that the pulse frequency range generated by the pulse generating circuit is 1mHz~400MHz, Minimum pulse width duty cycle step is %~ The output signal type of the pulse signal generation circuit can select the pulse code type signals in the pulse code format of return-to-zero code, non-return-to-zero code, return-to-zero code and pseudo-random code.