基于小型FPGA的快速AES算法研究

AES算法在实时数据加密中的应用对其处理速度及在FPGA中实现的功耗和成本提出较高要求。针对上述情况，介绍一种基于小型FPGA的快速AES算法的改进方法，通过微处理器完成AES算法中的密钥扩展运算，同时采用共享技术实现加密和解密模块共享同一密钥。实验结果表明，该方法可有效提高处理速度，节省FPGA资源，降低芯片功耗。

Research on Fast AES Algorithm Based on Small-scale FPGA

The application in real-time data encryption of Advanced Encryption Standard(AES) algorithm raises a high demand on the processing speed and the power consumption and cost for Field Programmable Gate Array(FPGA) implementation. Aiming at the case, an improved method for fast AES algorithm based on small-scale FPGA is proposed. The part of key expansion is implemented by microprocessor instead of FPGA, and the secret key is shared by both encryption and decryption module with the storage sharing technology. Experimental results show this method can promote the processing speed, save FPGA resource and reduce the chip power consumption.