| ASIC电路中时钟驱动的抗单粒子加固 |
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| 引用本文： | 王栋,徐睿,罗静. ASIC电路中时钟驱动的抗单粒子加固[J]. 电子与封装, 2011, 11(6): 18-22 |
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| 作者姓名： | 王栋 徐睿 罗静 |
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| 作者单位： | 中国电子科技集团公司第58研究所,江苏,无锡,214035 |
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| 摘 要： | CMOS工艺制成的ASIC电路在太空中应用时,在辐射效应的影响下可能导致数据出错,影响整个系统的可靠性.在ASIC电路的抗辐射设计时,最关注的是时钟(CLK)驱动电路受辐射效应的影响.为此,文章分析了深亚微米工艺条件下CLK电路受到单粒子瞬态扰动效应(SET)的影响,为消除SET效应对CLK电路的扰动提出了四种加固方案...
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| 关 键 词： | ASIC设计 辐射效应 抗辐射加固 时钟树 |
The Single Event Effect Hardness of CLK Tree in ASIC |
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| WANG Dong,XU Rui,LUO Jin. The Single Event Effect Hardness of CLK Tree in ASIC[J]. Electronics & Packaging, 2011, 11(6): 18-22 |
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| Authors: | WANG Dong XU Rui LUO Jin |
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| Affiliation: | WANG Dong,XU Rui,LUO Jin(China Electronics Technology Group Corporation No.58 Research Institute,Wuxi 214035,China) |
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| Abstract: | The ASICs which are made in CMOS technology suffer from the radiation effect when use in space.This leads to data mistakes,and influence the reliability of entire system.The radiation effect of CLK tree most attracts our eyes when our design the radiation hardness ASIC circuits.Therefore,we analyze the Single Event Transient influence of CLK tree in deep submicron process condition.For eliminating the upsets which is derived from SET in CLK tree,we put forward four hardened schemes,and the hardened principl... |
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| Keywords: | ASIC design radiation effects radiation hardness CLK tree |
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