有线数字广播中高阶QAM信号的载波同步与均衡器设计

针对ITU-T J.83标准，结合有线数字广播的信道特征，提出一种适用于高阶QAM信号的载波同步与自适应均衡的联合设计方案。该方案在均衡部分采用常模数算法(CMA)和最小均方误差算法(LMS)的双模均衡算法。通过算法的切换达到快速收敛和降低均方误差(MSE)的目的；针对高阶QAM信号，载波同步环路首先选用极性判决算法，并采用带宽较大的环路滤波器系数，使环路能在短时间内进行大范围频偏捕获。然后调低环路滤波器系数，减小环路带宽，进而降低稳态抖动。环路最后切换到判决指示算法，使相位均方差降至最低。整个方案通过算法验证并在Altera Stratix Ⅱ系列EP2S130F1020C5型现场可编程门阵列(FPGA)上完成了布局布线。最高工作频率为90.47MHz。

Implementation and design of equalizer and carrier recovery loop for high order QAM signals over cable

In view of the characteristics of cable channel, a joint design of adaptive equalizer and carrier recovery loop for high order QAM signals was proposed, which was suitable for ITU-T J.83 standard. The equalizer initially operated in Constant Modulus Algorithm (CMA) mode to compensate the channel distortion. When the eye diagram was opened, the equalizer switched to Least Mean Square (LMS) mode to decrease the Mean Square Error (MSE). For high order QAM signals, the carrier recovery loop initially operated in Polarity Decision Algorithm (PDA) under fast and slow modes which were set in Loop Filter (LPF) to capture the frequency offset. When the frequency offset was captured, the loop switched to Decision Direct Algorithm (DDA) to decrease the phase jitter. The simulation studies show the good performances of this design. The whole design was synthesized under Altera Stratix Ⅱ EP2S130F1020C5 FPGA. Highest clock frequency after being routed reached as high as 90.47MHz.