| SOC芯片设计与测试 |
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| 引用本文： | 谈颖莉,戎蒙恬. SOC芯片设计与测试[J]. 半导体技术, 2004, 29(6): 64-67,75 |
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| 作者姓名： | 谈颖莉 戎蒙恬 |
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| 作者单位： | 上海贝岭技术中心,上海,200233;上海交通大学,上海,200030 |
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| 摘 要： | SOC已经成为集成电路设计的主流.SOC测试变得越来越复杂,在设计时必须考虑DFT和DFM.本文以-SOC单芯片系统为例,在其设计、测试和可制造性等方面进行研究,并详细介绍了SOC测试解决方案及设计考虑.
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| 关 键 词： | 单芯片系统 面向测试设计 面向制造设计 位失效图 自动测试设备 |
| 文章编号： | 1003-353X(2004)06-0064-04 |
SOC design and test |
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| TAN Ying-li RONG Meng-tian. SOC design and test[J]. Semiconductor Technology, 2004, 29(6): 64-67,75 |
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| Authors: | TAN Ying-li RONG Meng-tian |
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| Affiliation: | TAN Ying-li1 RONG Meng-tian2 |
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| Abstract: | SOC (system-on-chip) products are more popular in nowadays. With the developmentof SOC design, SOC test becomes more and more complex. For high volume products, modern SOCdesign should take more consideration on design-for-test and design-for-manufacturability. Wepresent a case study of an SOC on design, test, and manufacturability, and carry out some ideas onSOC design and testing. |
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| Keywords: | SOC DFT(design-for-test) BFM(bit fail map) DFM(design-for-manufacturability ATE(automatic test equipment) |
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