| 基于FPGA机载实时视频图形处理系统的设计 |
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| 引用本文： | 尤力,夏伟杰,周建江.基于FPGA机载实时视频图形处理系统的设计[J].电子科技,2011,24(11):63-65,83. |
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| 作者姓名： | 尤力 夏伟杰 周建江 |
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| 作者单位： | (南京航空航天大学 电子信息工程学院,江苏 南京 210016) |
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| 摘 要： | 给出了某机载实时视频图形处理系统的硬件电路设计方案,以XC5VFX70T FPGA作为核心处理器,实现了对DVI及PAL等多种格式视频信号的解码、实时处理以及输出。系统电路设计简洁,具有较强的灵活性和扩展性。文中介绍了系统的硬件整体架构,论证了视频编解码模块和视频缓存模块的硬件设计方案。实际测试结果表明,系统能够流畅地...
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| 关 键 词： | 实时视频图形处理 嵌入式硬件设计 FPGA |
Hardware Design and Implementation of Real-time Airborne Video Image Processing System Based on FPGA |
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| YOU Li,XIA Weijie,ZHOU Jianjiang.Hardware Design and Implementation of Real-time Airborne Video Image Processing System Based on FPGA[J].Electronic Science and Technology,2011,24(11):63-65,83. |
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| Authors: | YOU Li XIA Weijie ZHOU Jianjiang |
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| Affiliation: | (College of Electronic and Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing 210016,China) |
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| Abstract: | The hardware design of a real-time airborne video image processing system is studied in this paper.The system uses the XC5VFX70T FPGA as the core processor to implement the decoding,real-time processing and encoding of video signals of such formats as DVI and PAL.The circuit design of the system is concise,flexible and scalable.The paper introduces the overall hardware architecture of the system.The hardware plans of the decoding module,encoding module and video buffer module are also designed in detail in this paper.The final results of the experiments prove that the system can process the high definition video with 1 600×1 200 resolution,60 frames/s fresh rate,24 bit true color fluently,and the processing time of one frame high definition video is less than 3 ms,which can meet the real-time requirements of the system. |
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| Keywords: | real-time video image process embedded hardware design FPGA |
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