运算放大器在高ESD应力作用下的失效模式和失效位置研究

本研究以常用的运算放大器之一LM741为例进行了高ESD应力条件下的运算放大器的失效研究,研究通过物理观察和电学测试的手段考察了LM741失效位置及失效模式与ESD击打模式之间的关系。研究表明,不同的应力击打模式均造成几种相同的失效位置和模式,而且对失效部位的物理观察发现：所造成芯片上的失效并非在芯片上的电路的单元内部,而在于电路的各个单元之间的绝缘层或者是连接电路单元的金属连线,这一发现为下一步ESD的失效建模和仿真提供了重要的试验依据。

Research of Failure Mode and Failure Position for the Operational Amplifier under the High ESD Stress

Using LM741 operational amplifier as example,this research studies the ESD operational amplifier failure under the high-stress conditions,and by physical observations and electrical testing means inspects the relationship between LM741 failure location,failure mode and hitting the ESD model.The results show that,different stress conditions cause several same locations and modes of failure,and the physical observations of failure locations find that the failure is not on the chip unit of the internal circuit,but the circuit insulations between the circuit units or the metal lines connecting the circuit units,and this discovery provides an important experimental basis for the next phase of the ESD failure modeling and simulation.