| 基于改进的混合压缩结构的Wallace树设计 |
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| 引用本文： | 邵磊,张树丹,于宗光.基于改进的混合压缩结构的Wallace树设计[J].电子与封装,2007,7(9):12-14,18. |
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| 作者姓名： | 邵磊 张树丹 于宗光 |
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| 作者单位： | 1. 江南大学信息工程学院,江苏,无锡,214036
2. 中国电子科技集团第58研究所,江苏,无锡,214035 |
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| 摘 要： | 文章针对典型的32位浮点乘法器,对Booth算法产生的部分积重新分组,采用CSA和4-2压缩器的混合电路结构,对传统的Wallace树型乘法器进行改进,并提出一种高速的树型乘法器阵列结构。该结构与传统的Wallace树型相比,具有更小的延时、更规整的布局布线,使其更易于VLSI实现。
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| 关 键 词： | 乘法器 4-2压缩器 CSA Wallace树 |
| 文章编号： | 1681-1070（2007）09-0012-03 |
| 修稿时间： | 2007-01-09 |
The Design of Wallace Tree by Using a Structure of Modified Mixed Compression |
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| SHAO Lei,ZHANG Shu-dan,YU Zong-guang.The Design of Wallace Tree by Using a Structure of Modified Mixed Compression[J].Electronics & Packaging,2007,7(9):12-14,18. |
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| Authors: | SHAO Lei ZHANG Shu-dan YU Zong-guang |
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| Affiliation: | 1. Institute of Information Engineering of Southern Yangtze University, Wuxi 214036, China; 2. The 58th Research Institute of China Electronic Technology Group, Wuxi 214035, China |
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| Abstract: | According to the typical 32-bit floating multiplier, the paper groups the partial products which are produced by Booth algorithm and then explores a design for high speed Wallace tree by a structure of modified 4-2 compressor and CSA compressor mixed. Compare to the traditional Wallace tree structure, the new structure has smaller time delay, more regular layout and also be easier for VLSI realization. |
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| Keywords: | multiplier 4-2 compressor carry save adder wallace tree |
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