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多晶硅发射极晶体管放大系数稳定性研究
引用本文:孙建洁,张可可,许帅,张明.多晶硅发射极晶体管放大系数稳定性研究[J].电子与封装,2021,21(4):50-53.
作者姓名:孙建洁  张可可  许帅  张明
作者单位:无锡中微晶园电子有限公司,江苏无锡214035
摘    要:通过对NPN型多晶硅发射极晶体管的工艺过程进行分析,对多晶淀积工艺过程提出严格的控制方案,使多晶界面氧化层厚度稳定在0.6~0.8 nm.同时,对基区与发射区退火工艺进行优化,使多晶发射极晶体管放大系数的片内均匀性从30%改善至20%,片间均匀性从12%改善至9%,显著提升了产品的成品率.

关 键 词:多晶硅发射极晶体管  放大系数  界面氧化层  退火

Research on the Stability of Amplification Coefficient of Ploysilicon Emitter Transistor
SUN Jianjie,ZHANG Keke,XU Shuai,ZHANG Ming.Research on the Stability of Amplification Coefficient of Ploysilicon Emitter Transistor[J].Electronics & Packaging,2021,21(4):50-53.
Authors:SUN Jianjie  ZHANG Keke  XU Shuai  ZHANG Ming
Affiliation:(Wuxi Zhongwei Microchips Co.,Ltd.,Wuxi 214035,China)
Abstract:In this paper,the technological process of NPN type ploysilicon emitter transistor is analyzed,and a strict control scheme is proposed for the ploysilicon deposition process,so that the thickness of the oxide layer at the multi-grain interface is stable at 0.6-0.8 nm.At the same time,the annealing process of base area and transmitting area was optimized,which improved the inter-chip uniformity of the amplification coefficient of the ploysilicon emitter transistor from 30%to 20%,and the uniformity between the chips increased from 12%to 9%,which significantly improved the product yield.
Keywords:ploysilicon emitter transistor  amplification coefficient  interface oxide layer  annealing
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