| 一种RS码编译码器的FPGA实现方法 |
| |
| 引用本文： | 刘大力,孙文方.一种RS码编译码器的FPGA实现方法[J].电子科技,2009,22(12):88-90. |
| |
| 作者姓名： | 刘大力 孙文方 |
| |
| 作者单位： | 西安电子科技大学,电子工程学院,陕西,西安,710071 |
| |
| 摘 要： | 介绍了RS255,223]编译码器的FPGA设计和基于线形反馈移位寄存器的编码器设计,以及由伴随式计算、关键方程求解、钱氏搜索、Forney算法等功能模块组成的译码器。为了实现简单高效的译码器,给出了一种改进的BM算法,该算法避免了求逆运算,提高了译码器处理速度及其硬件可实现性,并给出了仿真时序图。
|
| 关 键 词： | RS编译码 改进的BM算法 FPGA VHDL语言 |
FPGA-based Realization of a RS Encoder and Decoder |
| |
| Liu Dali,Sun Wenfang.FPGA-based Realization of a RS Encoder and Decoder[J].Electronic Science and Technology,2009,22(12):88-90. |
| |
| Authors: | Liu Dali Sun Wenfang |
| |
| Affiliation: | Liu Dali,Sun Wenfang(School of Electronic Engineering,Xidian University,Xi'an 710071,China) |
| |
| Abstract: | This paper presents the design of RS255,223] encoder and decoder using an FPGA device,the encoder based on linear feedback shifting register,and the decoder consisting of functional blocks such as calculating the syndromes,solving the key equation,Chien searching and Forney algorithm.To design a simpler and more efficient decoder,an improved BM algorithm is given which involves no inversion operation thus improving the processing speed and the hardware realizability of RS decoder.The result of simulation i... |
| |
| Keywords: | FPGA |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
| 点击此处可从《电子科技》浏览原始摘要信息 |
|
点击此处可从《电子科技》下载全文 |
|
