Diagnostic simulation of stuck-at faults in combinational circuits |
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Authors: | Sreejit Chakravarty Yiming Gong Srikanth Venkataraman |
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Affiliation: | (1) State University of New York, 14260 Buffalo, NY, USA;(2) Center for Reliable and High-Performance Computing, University of Illinios, 61801 Urbana, IL, USA |
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Abstract: | Two faults are said to be equivalent, with respect to a test set , iff they cannot be distinguished by any test in . The sizes of the corresponding equivalence classes of faults are used as a basis for comparing the diagnostic capability of two given test sets. A novel algorithm, called multiway list splitting, for computing the Equivalence Classes of stuck-at faults, in combinational (full scan) circuits, with respect to a given test set is presented. Experimental results presented show the algorithm to be more efficient than previously known algorithms based on decision diagrams and diagnosibility matrix.Portions of this work were presented in 1].Research Supported by NFS Grant No. MIP9102509.Research Supported by SRC Grant 93-DP-109. |
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Keywords: | diagnosis diagnostic power diagnostic resolution diagnostic simulation equivalence classes |
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