用于先进 CMOS电路的 150 mm硅外延片外延生长

随着大规模和超大规模集成电路特征尺寸向亚微米、深亚微米发展,下一代集成电路对硅片的表面晶体完整性和电学性能提出了更高的要求.与含有高密度晶体原生缺陷的硅抛光片相比,硅外延片一般能满足这些要求.该文报道了应用于先进集成电路的150mmP/P+CMOS硅外延片研究进展.在PE2061硅外延炉上进行了P/P+硅外延生长.外延片特征参数,如外延层厚度、电阻率均匀性,过渡区宽度及少子产生寿命进行了详细表征.研究表明:150mmP/P+CMOS硅外延片能够满足先进集成电路对材料更高要求,

Epitaxial Growth of 150mm Silicon Epi-Wafers for Advanced IC Applications

With the device feature's size miniaturization in very large scale integrated circuit and ultralarge scale integrated circuit towards the sub\|micron and beyond level, the next generation of IC device requires silicon wafers with more improved electrical characteristics and reliability as well as a high perfection of the wafer surface. Compared with the polished wafer with a relatively high density of crystal originated defects (e. g. COPs), silicon epi\|wafers can meet such high requirements. The current development of researches on the 150mm silicon epi\|wafers for advanced IC applications is described. The P/P\++ CMOS silicon epi\|wafers were fabricated on a PE2061 Epitaxial Reactor (made by Italian LPE Company). The material parameters of epi\|wafers, such as epi\|defects, uniformity of thickness and resistivity, transition width, and minority carrier generation lifetime for epi\|layer were characterized in detail. It is demonstrated that the 150mm silicon epi\|wafers on PE2061 can meet the stringent requirements for the advanced IC applications.