Alternate Testing of RF Transceivers Using Optimized Test Stimulus for Accurate Prediction of System Specifications

In the recent past, with the emergence of System-on-Chip (SoC), focus has shifted towards testing system specifications rather than device or module specifications. While the problem of test accessibility for test stimulus application and response capture for such high-speed systems remains a challenge to the test engineers, new test strategies are needed which can address the problem in a practical manner. In this paper, the problem of testing the transmitter and the receiver subsystems of a RF transceiver for system level specification is addressed. Instead of using different conventional test stimuli for testing each of the system level specifications of RF subsystems, a specially crafted test stimulus is used for testing all the specifications from the response of the subsystem-under-test. A new simulation approach has also been developed to perform fast behavioral simulations in frequency domain for the system-under-test. In the test method, frequency domain test response spectra are captured and non-linear regression models are constructed to map the spectral measurements onto the specifications of interest. In the presented simulation results, the test stimuli have been validated using netlist level simulation of the subsystem-under-test and specifications have been predicted within an error of ±3% of the actual value.Soumendu Bhattacharya was born in Calcutta, India, in 1978. He received his Bachelors degree from Indian Institute of Technology, Kharagpur, India, in 2000. In 2002, he received the M.S.E.E. degree in electrical engineering from Georgia Institute of Technology, Atlanta, USA. He is currently working toward his Ph.D. degree. In the summer of 2001, he worked as a summer intern in National Semiconductor, Santa Clara, CA, USA. His research interests are in the area of test generation for mixed-signal and RF circuits and systems and design-for-test.Achintya Halder received the B.S. degree in electronics and electrical communication engineering from the Indian Institute of Technology, Kharagpur, in 1998. He worked as an IC design engineer with Texas Instruments until 2000. Currently, he is a Ph.D. student and a research assistant with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta. His research area is analog/RF and mixed signal testing.Ganesh P. Srinivasan received the B.E. degree in Electronics and Communication Engineering from the National Institute of Technology and Science, University of Madras, Chennai (Madras), India, in 2002. He received the M.S. degree in Electrical and Computer engineering from the Georgia Institute of Technology, Atlanta, GA, in 2004 and is currently pursuing his Ph.D. degree in Electrical and Computer Engineering at the Georgia Institute of Technology, Atlanta, GA. His research interests include low cost testing approaches for analog/RF and mixed-signal circuits, and improving performance of low cost testers for enabling high quality tests.Abhijit Chatterjee received the Bachelor of Technology degree in electrical engineering from the Indian Institute of Technology, Kanpur, India, in 1981, the M.S. degree in electrical engineering and computer science from University of Illinois at Chicago in 1983 and the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign in 1990. Until December 1992, he was a Research Staff Member at the General Electric Research and Development Center in Schenectady, NY. His work has been cited by the Wall Street Journal and presented on a Japanese network TV program called High Tech Shower International. He is a collaborating partner in NASAs New Millennium Project. Dr. Abhijit Chatterjee is also the author of one U.S. patent and has over one hundred publications in referenced journals and conferences.