基于Xilinx FPGA DCM的研究与设计

为了使FPGA时钟在控制方面的设计更加简洁,介绍了一种基于Xilinx FPGA数字时钟的设计方法：数字时钟管理器（DCM）。对其工作原理、组成、使用方法及应用进行了系统描述,通过对DCM IP核的参数设置和程序设计实现了精准的倍频、分频和相位移动等功能,并在ISE13.1的开发环境下对其分别进行仿真,给出对应的清晰的仿真波形。用户可以根据实际设计的需要控制时钟完成任意的倍频和分频及相位移动,其操作简单、应用灵活,方便移植到其他应用中。

Research and design based on Xilinx FPGA DCM

In order to make the design more succinctly on the aspect of FPGA clock control, in this paper, we propose a design clock based on Xinlix FPGA, which is called Digital Clock Manager（DCM）. We depict its working principle, composition, usage and application detailedly. We set parameter and design program to realize the precise frequency doubling, frequency division and phase shift and other functions through the DCM IP core. Simulated them respectively in the ISE 13.1 development environment, the corresponding simulation waveform is presented clearly. The user can control any clock frequency doubling and frequency division and mobile phase according to design needs, the operation is simple, flexible application, it is convenient and portable to other applications.