| 运动估计芯片的缓存设计策略及FPGA验证 |
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| 引用本文： | 付宇卓.运动估计芯片的缓存设计策略及FPGA验证[J].高技术通讯,2000,10(10):19-22. |
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| 作者姓名： | 付宇卓 |
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| 作者单位： | 哈尔滨工业大学计算机系!哈尔滨150001 |
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| 基金项目： | 863计划资助项目!( 863 3 0 6 0 3 0 7 2 ) |
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| 摘 要： | 为解决更高视频图像中向运动估计芯片供数的存储器带宽过高的问题，提出了局存容量的设计策略，通过分析块匹配运动估计模型的特征和VLSI的要求，给出评价运动估计芯片局存的两个指标，由此得到一个制定局存容量的策略，遵照这一策略，为运动估计芯片提供了几个工程可用的指标，该研究来自于实现运动估计芯片的工作，对研究MPEG－2视频编码器的VLIS实时实现有一定的参考价值。
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| 关 键 词： | FBMA 搜索区域 参考块 动态存储器FPGA 运动估计芯片 缓存 设计策略 |
The Design Scheme of Motion Estimation Chip's Cache Architecture and It's Simulation Using FPGA |
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| Fu Yuzhuo,Ji Zhenzhou,Hu Mingzeng.The Design Scheme of Motion Estimation Chip's Cache Architecture and It's Simulation Using FPGA[J].High Technology Letters,2000,10(10):19-22. |
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| Authors: | Fu Yuzhuo Ji Zhenzhou Hu Mingzeng |
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| Abstract: | A design scheme of cache's capability is proposed. Firstly, two quotas which are used for evaluating ME's cache are given according to the character of the block match mode and VLSI, then an scheme of laying down the capability of cache is obtained. According to this scheme, several engineering parameters are proposed. Because the research comes from the work of ME chip's realization, it is beneficial to the work of researching MPEG 2' encoder. |
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| Keywords: | FBMA Motion estimation Search area Reference block Dynamic memory FPGA |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
