首页 | 本学科首页   官方微博 | 高级检索  
     


Breakdown voltage and on-resistance of multi-RESURF LDMOS
Affiliation:1. ARCES-DEI, University of Bologna, Cesena, Italy;2. DTG, University of Padova, Vicenza, Italy;3. Technology R&D, STMicroelectronics, Agrate Brianza, Italy;1. School of Semiconductor and Chemical Engineering, Semiconductor Physics Research Center, Chonbuk National University, Jeonju 561-756, Republic of Korea;2. Division of Material Science, Korea Basic Science Institute, Daejeon 305-806, Republic of Korea;3. Department of Nano-Optical Engineering, Korea Polytechnic University, Siheung 429-793, Republic of Korea;4. Electronics & Telecommunication Research Institute (ETRI), Daejeon 305-700, Republic of Korea;1. Department of Electronic Materials Engineering, Kwangwoon University, 20 Kwangwoon-ro, Nowon-gu, Seoul 01897, Republic of Korea;2. Material Technology Center, Korea Testing Laboratory, 87 Digitalro 26-gil, Guro-gu, Seoul 152-718, Republic of Korea;3. Department of Electrical Engineering, Chosun University, 309 Pilmun-daero, Dong-gu, Gwangju 61452, Republic of Korea;4. Department of Chemical Engineering, Kwangwoon University, 20 Kwangwoon-ro, Nowon-gu, Seoul 01897, Republic of Korea;1. Institute of Technology and Science, Tokushima University, Tokushima, 770-8506, Japan;2. School of Electronics and Information Technology, Sun Yat-Sen University, Guangzhou, 510275, People''s Republic of China
Abstract:The breakdown voltage and on-resistance of a multi-RESURF LDMOS are studied numerically and analytically. The results are compared with those from the conventional LDMOS. Reduction of on-resistance by 23% is obtained for the multi-layer structure without degradation in the breakdown voltage. An analytical expression for the surface potential distribution of the multi-layer structure is derived which provides a useful mean to determine the breakdown voltage analytically in terms of the device parameters.
Keywords:
本文献已被 ScienceDirect 等数据库收录!
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号