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基于VMM方法学的系统级软硬件协同仿真验证
引用本文:章林柯,王力,王艳武.基于VMM方法学的系统级软硬件协同仿真验证[J].微型机与应用,2011,30(12):81-84.
作者姓名:章林柯  王力  王艳武
作者单位:1. 海军工程大学振动与噪声研究所,湖北武汉,430033
2. 东南大学集成电路学院,江苏南京,210096
3. 92601部队,广东湛江,524009
摘    要:针对一款高性能复杂SoC芯片的设计,提出了一种新的软硬件协同仿真验证方案。通过比较仿真环境中软硬件间通信的各种实现方式,构建了一种新的符合VMM标准的验证平台。同时为加快覆盖率的收敛速度,给出了随机激励约束的优化方法。实践表明,新的约束和仿真方式使覆盖率收敛速度提高数倍,验证效率显著提高。

关 键 词:VMM方法学  软硬件协同验证  验证平台  覆盖率  SoC

VMM-based system-level software and hardware co-simulation verification
Zhang Linke,Wang Li,Wang Yanwu.VMM-based system-level software and hardware co-simulation verification[J].Microcomputer & its Applications,2011,30(12):81-84.
Authors:Zhang Linke  Wang Li  Wang Yanwu
Affiliation:Zhang Linke1,Wang Li2,Wang Yanwu3(1.Institute of Noise and Vibration,Naval University of Engineering,Wuhan 430033,China,2.College of Integrated Circuits,Southeast University,Nanjing 210096,3.92601 Unit,Zhanjiang 524009,China)
Abstract:To aim at a high-performance complex SoC chip design,the paper proposes a new hardware and software co-simulation verification.By comparing various hardware and software communication implementations for the simulation environment,a new platform to meet the VMM verification standards was built.At the same time to speed up the convergence rate,the optimization method for random constraints was given.Practice showed that with the new constraints simulation approach the convergence rate was increased by severa...
Keywords:VMM  hardware and software co-simulation verification  verification platform  coverage  SoC  
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