| 高阶电荷泵锁相环环路滤波器的设计 |
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| 引用本文： | 赵益波,冯久超.高阶电荷泵锁相环环路滤波器的设计[J].控制理论与应用,2011,28(3):433-437. |
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| 作者姓名： | 赵益波 冯久超 |
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| 作者单位： | 华南理工大学,电子与信息学院,广东,广州,510640 |
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| 基金项目： | 国家自然科学基金资助项目(60872123); 国家自然科学基金– 广东省自然科学基金联合基金资助项目(U0835001); 华南理工大学优秀博士论文创新基金资助项目(200913005). |
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| 摘 要： | 考虑到电荷泵锁相环离散采样特性,本文提出了高阶电荷泵锁相环环路滤波器的模块化设计方法.它可以将电荷泵锁相环设计成任意要求的阶和型.这样的锁相环既能消除相位抖动,又能跟踪大的频率阶跃或斜升的输入信号.通过对所设计的电荷泵锁相环稳定性和特征分析,确定了环路参数的选择范围,得出n阶n型的锁相环均优于其他类型.对两种类型的电荷泵锁相环的仿真,结果表明了设计方法的有效性和分析方法的正确性.本文的设计方法为高阶电荷泵锁相环滤波器的设计提供了重要的参考和指导.
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| 关 键 词： | 电荷泵锁相环 环路滤波器 稳定性 相位抖动 |
| 收稿时间： | 2009/12/7 0:00:00 |
| 修稿时间： | 2010/4/24 0:00:00 |
Design of loop filter for high order charge-pump phase-locked loops |
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| ZHAO Yi-bo and FENG Jiu-chao.Design of loop filter for high order charge-pump phase-locked loops[J].Control Theory & Applications,2011,28(3):433-437. |
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| Authors: | ZHAO Yi-bo and FENG Jiu-chao |
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| Affiliation: | School of Electronic and Information Engineering, South China University of Technology,School of Electronic and Information Engineering, South China University of Technology |
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| Abstract: | Considering the characteristics of discrete-time sampling for charge-pump phase-locked loops(CPPLLs), we propose a blocking design method for loop filter in high order CPPLLs. By this method, the CPPLL of any optional order and type can be derived, and phase jitters can be eliminated. Also, high frequency step input or ramp input can be tracked. By analyzing the stability and characteristics of CPPLLs, the range of the candidate loop parameters can be determined, from which the obtained CPPLLs of n-th order and n type are superior to others. Effectiveness of the design method and correctness of the analysis method are validated by the simulations of two types of CPPLLs. The proposed method provides an important reference and guideline for the design of high order CPPLLs Loop filters. |
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| Keywords: | CPPLL loop filter stability phase jitter |
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