数字集成电路的混合模式内建自测试方法

为以较少的硬件和测试时间开销获得对被测电路测试集的完全覆盖，提出一种基于扫描的数字集成电路混合模式内建自测试方法。通过对用作伪随机测试激励的线性反馈移位寄存器（LFSR）的结构和初态的选择以提高故障覆盖率和减少测试时间，对上述伪随机测试中未能覆盖的故障，采用一种不用存储来生成确定性测试矢量的方法。对标准电路的实验证明可获得较高的测试效率，特别适合数字集成电路的内建自测试。

A Mixed Mode BIST Approach of Digital Integrated Circuits

It aims at achieving complete coverage of test set for circuits under test with as less hardware overhead and time consumption as possible.A mixed-mode BIST methodology based on scan is presented.By the selection of infrastructure and initial state of linear feedback shift registers used as test stimuli during pseudorandom test,higher fault coverage and less hardware overhead are attained.Without by the aid of storage,a deterministic generation approach for those test patterns that are uncovered by pseudorandom test is applied also.The experiments on benchmark circuits prove that the method presented has higher test effectiveness and it is suitable for BIST of digital VLSI especially.