| 基于VME总线的高精度信号发生器的设计 |
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| 引用本文： | 张艳丽,安琪,刘树斌,王砚方. 基于VME总线的高精度信号发生器的设计[J]. 核技术, 2004, 27(9): 705-709 |
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| 作者姓名： | 张艳丽 安琪 刘树斌 王砚方 |
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| 作者单位： | 中国科学技术大学近代物理系快电子学实验室,合肥,230026;中国科学技术大学近代物理系快电子学实验室,合肥,230026;中国科学技术大学近代物理系快电子学实验室,合肥,230026;中国科学技术大学近代物理系快电子学实验室,合肥,230026 |
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| 摘 要： | 北京谱仪(BESⅢ)的飞行时间读出电子学(TOF)对于时间信号的测量具有非常高的要求，需要对TOF时间测量电路进行严格的测试。本文介绍了用于该测试的高精度信号发生器的实现方案，该电路能够产生抖动(Jitter)小于23．623ps的脉冲信号和抖动小于12．265ps的40．000MHz时钟信号。同时，对设计中使用的关键性技术一高速高精度时钟电路和脉冲产生电路的设计进行了分析。
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| 关 键 词： | VME 高精度信号发生器 高精度时钟信号 脉冲信号 |
A design of high accurate signal generator based on VME |
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| ZHANG Yanli AN Qi LIU Shubin WANG Yanfang. A design of high accurate signal generator based on VME[J]. Nuclear Techniques, 2004, 27(9): 705-709 |
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| Authors: | ZHANG Yanli AN Qi LIU Shubin WANG Yanfang |
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| Abstract: | The measurement of time signals in flight time readout (TOF) electronics of the third modification project of Beijing Spectrometer (BESIII) is very difficult according to the very high-resolution request, so we need to strictly test the design of the circuit for time measurement. This paper introduces the design of a high accurate signal generator circuit for this testing, which can generate pulse signal with the jitter less than 23.623 ps and clock signal with the jitter less than 12.265 ps. And two pivotal technologies, i.e. the designs of high-speed, high-resolution clock circuits and pulse generator circuits are discussed in this paper too. |
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| Keywords: | VME High accurate signal generator High accurate clock signal Pulse signal CLC TN0 |
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