一种用于继电保护测试装置的闭环控制正弦基准生成系统

针对目前继电保护测试装置在应用中实现小型化、智能化的需求,设计出了基于FPGA的闭环控制正弦信号基准生成系统。该系统采用FPGA作为片上系统,在芯片内集成了数字滤波器和PID控制器。设计出了低通和高通两种数字滤波器的原型,并通过递推算法在片内实现其功能。分析了解调中的幅值相位分离理论,并给出了相位环路和幅度环路的闭环控制框图,推导了控制器的离散表达式。实验结果表明,所设计的信号处理系统在输出信号幅值大于5V时,误差小于万分之一。当输出幅值信号较小时,相比开环系统,采用闭环控制系统的输出精度得到了明显的改善。在FPGA片内实现闭环正弦生成系统,为继电保护测试装置在保证精度的前提下提高系统集成度,提供了一种全新的设计思路和实现方法。

A Closed-loop Sinusoid Reference Generating System for Protection Relay Testing Device

A Closed-loop sinusoid reference generating system was designed based on FPGA, to meet the requirement of highly integrated and intelligent system in protection relay testing device. A FPGA was used as a system on chip, integrating digital filters and PID controllers. The prototypes of low pass and high pass digital filter was designed and their functions were implemented in the chip by recursion algorithm. The separating theory of amplitude and phase in demodulation was analyzed. Closed-loop control block diagrams of phase and amplitude were given, with the discrete expression of controller. The experimental results indicate that, the error was under 0.01% when outputting signal with amplitude above 5 volts. Comparing with open-loop system, the precision was improved with closed-loop system, when outputting lower amplitude signals. This closed-loop sinusoid generating system in a FPGA provides a novel design and implementation method for high precision and highly integrated protection relay testing device.