Thermal management of power electronics modules packaged by a stacked-plate technique

The research presented in this paper is part of a multidisciplinary research program of the Center for Power Electronics Systems at Virginia Tech. The program supported by the Office of Naval Research focuses on the development of innovative technologies for packaging power electronics building blocks. The primary objective of this research is to improve package performance and reliability through thermal management, i.e., reducing device temperatures for a given power level. The task of thermal management involves considering trade-offs in the electrical design, package layout and geometry, materials selection and processing, manufacturing feasibility, and production cost. Based on the electrical design of a simple building block, samples of packaged modules, rated at 600 V and 3.3 kW, were fabricated using a stacked-plate technique, termed metal posts interconnected parallel plate structure (MPIPPS). The MPIPPS technique allows the power devices to be interconnected between two direct-bond copper substrates via the use of metal posts. Thermal modeling results on the MPIPPS packaged modules indicate that the new packaging technique offers a superior thermal management means for packaging power electronics modules.