Interconnect resistance characteristics of several flip-chip bumping and assembly techniques

Several flip-chip interconnection methods were compared by measuring interconnect resistance before and after exposure to environments including pre-conditioning, 85°C/85% RH exposure, 150°C storage, and 0–100°C temperature cycling. The goal was to determine an acceptable low-cost, reliable method for bumping and assembling chips to flexible or rigid substrates using flip-chip assembly techniques. Alternative flip-chip bumping methods are compared to a traditional wafer solder bumping method. Flip-chip interconnection methods evaluated included high lead content solder, silver filled conductive adhesive, and gold stud bumps. Under bump metallurgies evaluated included bare aluminum, evaporated Cr/Cr–Cu/Cu, and electroless nickel plating.