| 嵌入式处理器的TLB电路设计 |
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| 引用本文： | 凌青,高沁伟,杨军. 嵌入式处理器的TLB电路设计[J]. 电气电子教学学报, 2006, 28(1): 57-60 |
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| 作者姓名： | 凌青 高沁伟 杨军 |
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| 作者单位： | 东南大学,国家专用集成电路系统工程技术研究中心,江苏,南京,210096;东南大学,国家专用集成电路系统工程技术研究中心,江苏,南京,210096;东南大学,国家专用集成电路系统工程技术研究中心,江苏,南京,210096 |
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| 摘 要： | 为了提高基于虚拟存储技术的嵌入式处理器的性能，本文提出了一种用于高效加速地址转换的TLB电路结构。该电路采用64-entries的全关联结构，硬件支持基于段及不同大小页的转换方式。通过VCS和Nanosim联合仿真对电路结构和性能进行了验证，仿真结果表明，系统中加入TLB电路以后性能有显著的提高。
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| 关 键 词： | 嵌入式处理器 TLB VCS 地址转换 |
| 文章编号： | 1008-0686（2006）01-0057-04 |
| 收稿时间： | 2005-09-16 |
| 修稿时间： | 2005-12-13 |
Design of TLB for Embedded Processor |
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| LING Qing,GAO Qin-wei,YANG Jun. Design of TLB for Embedded Processor[J]. Journal of Electrical & Electronic Engineering Education, 2006, 28(1): 57-60 |
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| Authors: | LING Qing GAO Qin-wei YANG Jun |
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| Affiliation: | The National ASIC Systems Engineering Technology Research Center, Southeast Univ, , Nanjing 210096, China |
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| Abstract: | In order to improve the performance of the embedded processor based on virtual memory, this paper proposes a viable structure of TLB which used to speed up the transition of addresses. It is fullyassociated with 64 entries, and can support the transition based on section and different page sizes. We use the tool of VCS together with Nanosim to do the simulation. The result by using the TLB shows that the performance of system can be grealty improved. |
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| Keywords: | TLB VCS |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ |
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