一种高效高速的大容量FPGA电路功能验证方法

对大容量FPGA芯片进行功能验证时,如何提高验证效率以及验证用例的覆盖率已经成为缩短总体产品时间所面临的挑战.针对上述问题,提出了一种高效、高速的大容量FPGA电路验证方法,可以根据验证用例需求,利用FPGA预先配置一定的功能,通过采取不同的配置文件得到最优网表.该验证方法具有灵活动态配置网表功能,可以节省仿真资源80％左右,大幅度缩短仿真时间,仿真器运行速度至少提高20倍,同时可以提高验证效率,最大限度地提高验证电路的覆盖率,能够满足大容量电路功能仿真的需求.该验证方法已成功应用于大容量FPGA电路功能验证工程实践中.

An Efficient and High-Speed Functional Verification Method of the Large-Capacity FPGA Circuit

For the large-capacity FPGA chip functional verification,how to improve the verification efficiency and the verification cases coverage rate has become a challenge to reduce the total product time.For the above problem,an efficient and high-speed method for the verification of the large-capacity FPGA circuit was presented,which could generate the optimal netlist based on the demands of verification test cases by pre-setting some functions by FPGA and taking different configuration files.This verification method has the flexible function to dynamically configure the netlist,which can save about 80％ of simulation resources,reduce the simulation time significantly and increase the speed of the emulator by at least 20 times,meanwhile can improve the efficiency of verification and maximize the coverage rate of the verification circuit to meet the needs of large-capacity circuit function simulation.This verification method has been successfully applied to the engineering practice of the large-capacity FPGA circuit function verification.