| 面向应用的可重构编译器ASCRA(英文) |
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| 引用本文： | 吴艳霞,顾国昌,孙延腾,杨敏,杨杰,牛晓霞,孙霖. 面向应用的可重构编译器ASCRA(英文)[J]. 计算机科学与探索, 2011, 5(3): 267-279. DOI: 10.3778/j.issn.1673-9418.2011.03.008 |
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| 作者姓名： | 吴艳霞 顾国昌 孙延腾 杨敏 杨杰 牛晓霞 孙霖 |
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| 作者单位： | 哈尔滨工程大学,计算机科学与技术学院,哈尔滨,150001 |
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| 基金项目： | The National Natural Science Foundation of China under Grant No.61003036，the Postdoctoral Science Foundation of China under Grant No.20100471022，the Natural Science Foundation of Heilongjiang Province of China under Grant No.QC2010049，the Fundamental Research Funds for the Central Universities of China under Grant No.HEUCF100606 |
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| 摘 要： | 在很多应用领域已经开展了可重构计算的研究,但是由于缺乏高层设计工具,设计者需要较深的软件和硬件专业知识才能开发GPP/RAU架构的程序,阻碍了其大规模应用。提出了一种面向应用的可重构编译器——ASCRA的初始架构,它可以自动将C语言映射为VHDL语言,从而解决可重构计算中自动编译工具的瓶颈。ASCRA编译器主要研究软硬件划分技术和面向硬件的优化技术,如脉动阵列、循环流水技术。在ML505开发平台上,设计实现了ASCRA编译器的验证平台,并通过实验给出了核心程序段生成VHDL代码的综合信息。
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| 关 键 词： | 可重构编译 通用处理器(GPP)/可重构加速单元(RAU) 软硬划分 循环 |
| 修稿时间： | |
Application-Specific Compiler for Reconfigurable Architecture ASCRA |
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| WU Yanxia,GU Guochang,SUN Yanteng,YANG Min,YANG Jie,NIU Xiaoxia,SUN Lin. Application-Specific Compiler for Reconfigurable Architecture ASCRA[J]. Journal of Frontier of Computer Science and Technology, 2011, 5(3): 267-279. DOI: 10.3778/j.issn.1673-9418.2011.03.008 |
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| Authors: | WU Yanxia GU Guochang SUN Yanteng YANG Min YANG Jie NIU Xiaoxia SUN Lin |
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| Affiliation: | College of Computer Science and Technology, Harbin Engineering University, Harbin 150001, China |
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| Abstract: | sign tools, the designer needs both in-depth software and hardware design knowledge to develop applications for GPP/RAU hybrid system so that it hampers the widespread adoption of reconfigurable computing systems. This paper presents an initial ASCRA (application-specific compiler for reconfigurable architecture) compilation framework for automatic mapping of C to VHDL that brings the gap in automatic compilation tools for reconfigurable computing. In ASCRA, hardware/software partitioning technology and hardware-oriented optimization techniques, such as systolic array, loop pipelining, are mainly concerned. And a verification platform of ASCRA is built on an ML505 development board. An experiment on selected kernels that shows synthesis results of generated VHDL codes is also proposed. |
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| Keywords: | reconfigurable compiler general purpose processor (GPP) / reconfigurable acceleration units (RAU) hardware/software partitioning loops |
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