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CCD相机视频处理电路设计
引用本文:魏伟,刘恩海,郑中印. CCD相机视频处理电路设计[J]. 光电工程, 2012, 39(6): 144-150
作者姓名:魏伟  刘恩海  郑中印
作者单位:1. 中国科学院光电技术研究所,成都610209;中国科学院研究生院,北京100049
2. 中国科学院光电技术研究所,成都,610209
摘    要:为了提高CCD相机的成像质量,对CCD的噪声进行了分类和分析,设计了高信噪比的视频处理电路。讨论了针对复位噪声和1/f噪声进行处理的相关双采样电路的原理。以专用视频处理芯片VSP2270和FPGA为核心设计了视频处理电路。最后结合CCD驱动电路,进行了图像采集和信噪比测试实验。实验结果表明,视频处理电路在本身引入噪声较小的同时,有效地抑制了CCD复位噪声、1/f噪声等噪声。数据输出率为20MHz时,整机系统信噪比高达58.4dB。基本满足星图成像的应用要求。

关 键 词:CCD  复位噪声  1/f噪声  VSP2270  FPGA  信噪比
收稿时间:2012-01-09

Video Signal Processing Circuit Design of CCD Camera
WEI Wei , LIU En-hai , ZHENG Zhong-yin. Video Signal Processing Circuit Design of CCD Camera[J]. Opto-Electronic Engineering, 2012, 39(6): 144-150
Authors:WEI Wei    LIU En-hai    ZHENG Zhong-yin
Affiliation:1,2(1.Institute of Optics and Electronics,Chinese Academy of Sciences,Chengdu 610209,China;2.Graduate University of Chinese Academy of Sciences,Beijing 100049,China)
Abstract:In order to improve imaging performance of CCD camera, the CCD noise is categorized and analyzed, and high SNR video signal processing circuit is designed. The principle of Correlated Double Sample (CDS) circuit, which is aimed at processing reset noise and 1/f noise, is discussed. Video signal processing circuit is designed with specific video processing chip VSP2270 and FPGA as the core. At last, the experiments of image acquisition and SNR test are introduced together with CCD driving circuit. The results show that the video signal processing circuit effectively inhibits reset noise and 1/f noise, but the circuit noise itself is small. The system SNR reaches up 58.4 dB when data rate is 20 MHz, which meets the requirements of star map imaging.
Keywords:CCD  reset noise  1/f noise  VSP2270  FPGA  SNR
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