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Chemical synthesis,structural characterization and electrical studies of nanoceria for CMOS applications
Authors:K P Priyanka  K K Babitha  A Sreedevi  X Sheena  E M Mohammed  Thomas Varghese
Affiliation:1. Nanoscience Research Centre (NSRC), Department of Physics, Nirmala College, Muvattupuzha, 686 661, Kerala, India
2. Department of Applied Sciences, Vidya Academy of Science & Technology, Thrissur, 680501, Kerala, India
3. Department of Applied Science and Humanities, Thejus Engineering College, Thrissur, 680584, Kerala, India
4. Department of Physics, Maharajas College, Ernakulam, 682 011, Kerala, India
Abstract:Cerium oxide nanoparticles were synthesized using cerium nitrate hexa hydrate and ammonium carbonate as precursors. Structural characterizations were done using X-ray diffraction (XRD) and transmission electron microscopy (TEM). The crystallite size and lattice strain on the peak broadening of CeO2 nanoparticles were studied using Williamson-Hall (W-H) analysis. The dielectric properties of nanocrystalline CeO2 samples with different calcination temperatures, and frequencies have been studied over a temperature range from 303 to 423 K. It is found that the dielectric constant and dielectric loss for all temperatures have high values at low frequencies, which decreases rapidly as frequency is increased and attains a constant value at higher frequencies. The room temperature dielectric constant ε′ obtained for the as prepared CeO2 nanoparticle sample is 61, which constitutes the highest value ever reported at low frequency. A.C. conductivity, which was derived from dielectric constant and loss tangent data, has a low value at smaller frequencies that increases as the frequency is increased. The dielectric constant and a.c. conductivity values are shifted upwards as the temperature is raised. However, these values are decreased as the annealing temperature is increased. The desired structural properties and high dielectric constant of nanophase CeO2 make it as a promising material for the high dielectric constant dielectric gate in complementary metal oxide semiconducting (CMOS) devices.
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