| 高速嵌入式系统中的电源完整性设计方法 |
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| 引用本文： | 周子琛,申振宁. 高速嵌入式系统中的电源完整性设计方法[J]. 单片机与嵌入式系统应用, 2010, 0(3): 19-21 |
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| 作者姓名： | 周子琛 申振宁 |
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| 作者单位： | 1. 武警工程学院电子技术系,西安,710086
2. 武警工程学院电子技术系,西安,710086;西安电子科技大学 |
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| 摘 要： | 描述了高速嵌入式系统中电源分布网络（Power distribution network,PDN）的组成和特性。解释了目标阻抗和电源分布网络阻抗的概念,以及它们与电源完整性之间的关系。以OMAP5910为例,说明了在实际设计中如何选择、放置去耦电容。最后,给出了板级实现方案。
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| 关 键 词： | 电源分布网络 电源完整性 目标阻抗 印刷电路板 去耦电容 |
Power Integrity Design in High Speed Embedded System |
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| Zhou Zichen,Shen Zhenning. Power Integrity Design in High Speed Embedded System[J]. Microcontrollers & Embedded Systems, 2010, 0(3): 19-21 |
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| Authors: | Zhou Zichen Shen Zhenning |
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| Affiliation: | 1. Department of Electronic Technology;Engineering College of CAPF;Xi'an 710086;China;2. Xidian University |
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| Abstract: | The structure and characteristics of power distribution system in high speed embedded system are described. The relationship between target impedance and power distribution network (PDN) impedance is explained. As an example, OMAP5910 is selected to show how to choose and place the decouple-capacitor in the design. The printed board circuit is presented to show the result. |
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| Keywords: | PDN power integrity target impedance PCB decouple capacitor |
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